The truth table for the circuit given in the fig. is :

  • Option 1)

    \begin{vmatrix} A & B &Y \\ 0 & 0 &1 \\ 0& 1 & 1\\ 1& 0 & 0\\ 1& 1 & 0 \end{vmatrix}

  • Option 2)

    \begin{vmatrix} A & B &Y \\ 0 & 0 &1 \\ 0& 1 & 1\\ 1& 0 & 1\\ 1& 1 & 1 \end{vmatrix}

  • Option 3)

    \begin{vmatrix} A & B &Y \\ 0 & 0 &0 \\ 0& 1 & 0\\ 1& 0 & 1\\ 1& 1 & 1 \end{vmatrix}

  • Option 4)

    \begin{vmatrix} A & B &Y \\ 0 & 0 &1 \\ 0& 1 & 0\\ 1& 0 & 0\\ 1& 1 & 0 \end{vmatrix}

 

Answers (1)

 

NAND gate -

NOT + AND gate

- wherein

Y= \overline{A\cdot B}

A and B are input

Y is out put

 

 

By putting values of the 4 cases, you can see that the option (1) is correct


Option 1)

\begin{vmatrix} A & B &Y \\ 0 & 0 &1 \\ 0& 1 & 1\\ 1& 0 & 0\\ 1& 1 & 0 \end{vmatrix}

Option 2)

\begin{vmatrix} A & B &Y \\ 0 & 0 &1 \\ 0& 1 & 1\\ 1& 0 & 1\\ 1& 1 & 1 \end{vmatrix}

Option 3)

\begin{vmatrix} A & B &Y \\ 0 & 0 &0 \\ 0& 1 & 0\\ 1& 0 & 1\\ 1& 1 & 1 \end{vmatrix}

Option 4)

\begin{vmatrix} A & B &Y \\ 0 & 0 &1 \\ 0& 1 & 0\\ 1& 0 & 0\\ 1& 1 & 0 \end{vmatrix}

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