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header-bg qa

Truth table for the given circuit (Fig. 14.6) is

A.

A B C
0 0 1
0 1 0
1 0 1
1 1 0


B.

A B C
0 0 1
0 1 0
1 0 0
1 1 1

C.

A B C
0 0 0
0 1 1
1 0 0
1 1 1

D.

A B C
0 0 0
0 1 1
1 0 1
1 1 0

Answers (1)

The answer is the option (c)

(c) In this problem the input C of OR get and when which is an output of AND gate . So, "C equals A AND B" or C=A.B and  "D equals NOT A AND B" or D=\bar{A}.B

and "E equals C AND D "or E=C+D=(A.B)+(A.B) Now we can generate the truth table of this arrangement of gates can be given bt

A B \bar{A} C=A.B d=\bar{A}.B E=(C+D)
0 0 1 0 0 0
0 1 1 0 1 1
1 0 0 0 0 0
1 1 0 1 0 1

 

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